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Information Technology

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Displaying 1 - 25 of 4378

IEEE 1451.0-based Web of Thing (WoT) Ontology

March 10, 2025
Author(s)
Eugene Song, Helbert da Rocha, Antonio Espirito-Santo, Riccardo Brama
Internet of Things (IoT) ecosystems are highly heterogeneous in terms of smart sensors/devices, connectivity, communication protocols, data formats, and platforms. The major challenges of IoT ecosystems are fragmentation or disintegration and cross-domain

Security for IEEE P1451.1.6-based Sensor Networks for IoT Applications

March 10, 2025
Author(s)
Eugene Song, Kang B. Lee, Hiroaki Nishi, Janaka Wejekoon
There are many challenges for Internet of Things (IoT) sensor networks including the lack of robust standards, diverse wireline and wireless connectivity, interoperability, security, and privacy. Addressing these challenges, the Institute of Electrical and

Semantics for Enhancing Communications- and Edge-Intelligence-enabled Smart Sensors: A Practical Use Case in Federated Automotive Diagnostics

March 10, 2025
Author(s)
Eugene Song, Thomas Roth, David A. Wollman, Eoin Jordan, Martin Serrano, Amelie Gyrard
Modern edge artificial intelligence (AI) chipsets and edge-intelligence-enabled smart sensors frameworks support real-time data processing and event detection at the signal source. Beyond just measuring local conditions and transmitting corresponding

A Security Perspective on the Web3 Paradigm

February 25, 2025
Author(s)
Dylan Yaga, Peter Mell
Web3 is a proposed vision for the future of the internet that is restructured to be more user-centric with an emphasis on decentralized data. Users would own and manage their personal data, and systems would be decentralized and distributed. Digital tokens

Photonic Millimeter-wave Generation Beyond the Cavity Thermal Limit

February 11, 2025
Author(s)
William Groman, Igor Kudelin, Takuma Nakamura, Yifan Liu, Charles McLemore, Franklyn Quinlan, Scott Diddams, Dahyeon Lee, Megan Kelleher, Joel Guo, Warren Jin, John Bowers
With the next generation of telecommunications and radar/navigation upon us, moving from the microwave to the higher bandwidth, millimeter-wave domain has become ever relevant. Simultaneously, the burgeoning field of photonic integrated chips has yielded a

Designing Usable Audio for Voting Systems: Best Practices and a Test Approach

January 31, 2025
Author(s)
Lynn Baumeister, Whitney Quesenbery, Sharon J. Laskowski
Voting systems must support multiple interaction modes: presenting information both visually and auditorily, accepting navigation and selections from both screen touches and key presses on a tactile controller. The best practices outlined in this document

Security Property Verification by Transition Model

January 31, 2025
Author(s)
Chung Tong Hu
Verifying the security properties of access control policies is a complex and critical task. The policies and their implementation often do not explicitly express their underlying semantics, which may be implicitly embedded in the logic flows of policy

Enabling Global Image Data Sharing in the Life Sciences

December 23, 2024
Author(s)
Anne L. Plant, Peter Bajcsy
Public, reference data are one of the most important foundational resources in the modern life and biomedical sciences. Over the last 40 years, the public release and availability of genomic and macromolecule structural databases accelerated discovery

Implementation Guidance for Common Data Formats

November 15, 2024
Author(s)
John Dziurlaj
This document discusses various topics related to the practical implementation of the NIST Voting Common Data Formats. This includes materials on how the CDFs are constructed, cross-referencing data inside and outside CDF instances, handling of

Hardware Security Failure Scenarios

November 13, 2024
Author(s)
Peter Mell, Irena Bojanova
Historically, hardware has been assumed to be inherently secure. However, chips are both created with software and contain complex encodings (e.g., circuit designs and firmware). This leads to bugs, some of which compromise security. This publication

POTENT: Post-Synthesis Obfuscation for Secure Network-on-Chip Architectures

November 5, 2024
Author(s)
Kostas Amberiadis, Dipal Halder, Sandip Ray, Yuntao Liu, Ankur Srivastava
We develop a novel post-synthesis obfuscation technique, POTENT, to protect NoC fabrics against reverse engineering attacks. POTENT integrates programmable switches at NoC routers, concealing topology and communication paths under a dynamically controlled

Base de referencia de las capacidades de apoyo no tecnicas del IoT

October 30, 2024
Author(s)
Michael Fagan, Katerina Megas, Jeffrey Marron, Kevin Brady, Barbara Cuthill, Rebecca Herold
Las capacidades de apoyo no técnicas son acciones que realiza un fabricante o una organización de terceros en apoyo de la seguridad cibernética de un dispositivo de Internet de las cosas (IoT, por sus siglas en inglés). Esta publicación define una línea

Service Mesh Proxy Models for Cloud-Native Applications

October 16, 2024
Author(s)
Ramaswamy Chandramouli, Zack Butcher, James Callaghan
The service mesh has become the de facto application services infrastructure for cloud-native applications. It enables the various runtime functions of an application through proxies that form the data plane of the service mesh. Depending on the

BIT-FL: Blockchain-Enabled Incentivized And Secure Federated Learning Framework

October 14, 2024
Author(s)
Tao Zhang, Chenhao Ying, Fuyuan Xia, Haiming Jin, Yuan Luo, David Wei, Xinchun Yu, Yibin Xu, Xikun Jiang, Weiting Zhang, Dacheng Tao
Federated learning (FL) enables the protection of data privacy through collaborative training of a machine learning (ML) model without sharing local data. However, several common problems arise when designing FL frameworks, as they rely on a central server

Developing Interoperable, Accessible Software via the Atomic, Molecular, and Optical Sciences Gateway: A Case Study of the B-spline atomic R-Matrix code Graphical User Interface

October 3, 2024
Author(s)
Barry I. Schneider, kathryn hamilton, Sudhakar Pamidighantam, Tom Wolcott
The Atomic, Molecular, and Optical Science Gateway\citeamosgateway} is a comprehensive cyber\-infrastructure for research and educational activities in computational AMO science. The \hbox$B$-Spline} atomic \hbox$R$-Matrix} (BSR) suite of programs is

Report on Secure Hardware Assurance Reference Dataset (SHARD) Program

October 1, 2024
Author(s)
Paul E. Black, Vadim Okun
Significant vulnerabilities have been found in chips. Computer programs and methods have been developed to prevent, find, and mitigate them. We proposed Secure Hardware Assurance Reference Dataset (SHARD) as a repository of reference examples (test cases)

A Data Protection Approach for Cloud-Native Applications

September 30, 2024
Author(s)
Ramaswamy Chandramouli, Wesley Hales
This document addresses the need for effective data protection strategies in the evolving realm of cloud-native network architectures, including multi-cloud environments, service mesh networks, and hybrid infrastructures. By extending foundational data

Summary Report: CHIPS R&D Program Standards Summit

September 27, 2024
Author(s)
Mary Bedner, Chris Greer
The mission of the National Institute of Standards and Technology's (NIST) CHIPS Research and Development Office (CHIPS R&D) under the Department of Commerce's CHIPS for America Program is to accelerate the development and commercial deployment of

Proxy Validation and Verification for Critical AI Systems

September 26, 2024
Author(s)
Phillip Laplante, Joanna DeFranco, D. Richard Kuhn, Jeff Voas
This white paper offers a suggestion that prior testing artifacts from similar AI systems can be reused for new AI software. Testing AI and Machine learning software is difficult, and if prior testing results from similar systems could be applied as a

IP Security in Structured ASIC: Challenges and Prospects

September 25, 2024
Author(s)
Rasheed Almawzan, Sudipta Paria, Aritra Dasgupta, Kostas Amberiadis, Swarup Bhunia
With the globalization of hardware manufacturing and the growing demand for electronics, companies now heavily rely on offshore facilities for most of the design and manufacturing processes, including emerging technologies like Structured ASICs